The circuit consists of a grid of 400 titanium wires crossed by 400 silicon wires, each 15 nanometers wide, with molecular switches between the junctions.  It has 160 kilobits of capacity in the size of a white blood cell, the densest memory circuit ever made, at 100 gigabit per square centimeter.  

     They anticipate increasing density to nearly 1000 gigabits per square centimeter, after which they will simply begin to run out of molecules.

     Manufacturing electronic circuitry at this scale enables a whole new realm of applications including nanoscale sensors, energy-efficient logic, thermoelectrics, and let’s not forget portable digital electronics.

     Just think what this would mean for mobility!  Lower power consumption, higher memory capacities.  Hey, I could always use 120GB of memory in my PDA phone.

     But, you don’t have access to this technology yet.  It’s still in its infancy, and will not be ready for mass production for another 10 years or so.  It is, however, ahead of Moore’s law, and should allow us to come up with more techniques to keep up with the doubling of circuit density every 2 years for quite awhile.

Caltech press release